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PCB Layout Allegro X PCB Sigrity X Aurora Sigrity
Designing PCBs for Signal and Power Integrity in Allegro X
Manage SI/PI across PCB design with Allegro X. This guide covers stackup, constraints, analysis, and signoff to reduce rework and speed delivery of high-performance, manufacturing-ready boards.
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How to Incorporate Supply Chain Data into PCB Component Selection
Learn how to incorporate supply chain data into PCB component selection to reduce BOM risk, avoid redesigns, and ensure component availability throughout the design lifecycle.
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PCB Layout Allegro X PCB PSpice Sigrity Allegro X
What the Schematic Does Not Show in a Flyback Converter
Flyback converter design fails in what the schematic hides: isolation gaps, dual ground domains, leakage inductance spikes, and EMI return paths. Learn the first-pass decisions that make it work.
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Where to Place Phase Delay Bumps on a Differential Pair
Where you put the phase delay bumps on a differential pair is not a preference. It changes your EMI, your common mode noise, and whether your signals arrive intact at the receiver. This video covers t
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Why Differential Pairs Still Need a Return Plane
Differential pairs don't need a return plane. You may have heard that before. It's wrong. This video proves it with simulation. Using the SATA 100Ω differential pair from the previous video, we run th
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Case Study
Allegro X PCB
ZF Automotive Leverages In-Design Analysis to Reduce MIPI Interface Design Time
This case study shows how ZF Automotive used Sigrity X Aurora in-design analysis to reduce MIPI interface design time.
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VIDEOS

Power up PCB projects with design solutions & innovations

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Reliability Overview | Allegro X
In this video we will discuss the four reliability features, Schematic Audit, Electrical Stress Analysis, Meantime Before Failure and Power Topology Analysis
Allegro X PCB
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How Do You Know If Your Vias Can Handle The Current Through Your PCB
"How many vias do you need?" It depends, but crossing your fingers and adding more hoping for the best isn't an answer. IR drop is a geometry problem, and the only reliable way to solve it is to simul
Allegro X PCB
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Coupling and Crosstalk - What Causes Them
Two traces routed too close together share more than space, they share energy. That electromagnetic coupling is crosstalk, and it doesn't take much to cause bit errors, signal distortion, and chips re
Allegro X PCB
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How Do I Know If My Signal Will Have Integrity Problems Before I Build the Board
Best practices and stack-up recommendations will get you close but they won't tell you whether your differential pairs actually pass at the data rate you're targeting. The only way to know before the
Allegro X PCB
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What Happens to Differential Pair Signals at 1GHz High Speeds
Same stack up. Same length matching. Same impedance targets. Different routing path and a completely different eye diagram. This video proves why routing decisions on high-speed differential pairs lik
Allegro X PCB
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How HDI Via Density Can Break Your Power Planes
Standard DRCs won’t flag power delivery failures that may be present in your HDI PCB. When you break out a dense BGA, every microvia introduces an anti-pad into your power and ground planes. For a 0.4
Allegro X PCB
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Resources

Deep dive into PCB engineering content

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Design Guides

Navigate complex PCB design challenges with in-depth guides including practical advice, and proven techniques.

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Product Documents

A comprehensive set of inline documentation for OrCAD X PCB Designer covering theory, workflow, and configuration options.

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Whitepapers

NDive deep into PCB design and analysis with comprehensive white papers and briefs from Cadence's top engineers and industry thought leaders.

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